1950 MHz
Boost Clock65 W
TDP3 nm
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Core Specifications
Architecture:
Xe2-LPG
Process Size:
3 nm
Base Clock:
300 MHz
Boost Clock:
1950 MHz
Shader Units:
256
TMUs:
16
ROPs:
8
Memory & Performance
Memory Type:
System Shared
Bus Interface:
Ring Bus
TDP:
65 W
Cache & Die Information
Die Size:
243 mm²
Transistors:
17.8 billion
Transistor Density:
73.3 million/mm²
Quick Facts
Performance
Pixel Fill Rate
15.6 GPixel/s
Texture Fill Rate
31.2 GTexel/s
FP32 Performance
1.0 TFLOPS